AMD's upcoming 12-core chips will draw the same power as existing six-core chips, but will have reduced clock speeds.
The company's upcoming 12-core server chips, code-named Magny-Cours, put two six-core chips in one package.
The same silicon is used in existing six-core chips, code-named Istanbul, which are part of the Opteron line of server processors. AMD designed Magny-Cours chips to draw the same power as Istanbul chips, said Pat Conway, a member of AMD's technical staff, in a presentation at the Hot Chips conference at Stanford University.
Responding to an audience question about how Magny-Cours, with two chips, will use the same power as one Istanbul chip, Conway said that AMD is reducing the clock speeds of the Magny-Cours and added that power management features are being added.
However, Conway declined to comment on potential clock speeds of 12-core chips in response to a question. "That's a detail we're going to save for the product launch," Conway said. The chips are aimed at servers and are due out in the first quarter of 2010.
Chip makers like Intel and AMD reverted to adding cores to boost chip performance earlier in the decade, as cranking up clock speed led to excessive heat dissipation and power consumption.
Even though the clock frequencies will fall, Magny-Cours chips will pack more performance compared to existing Opteron chips, Conway said. The larger cache and increased cores will make servers faster, Conway said. For example, a server will be able to execute tasks faster in virtualised environments with a larger number of cores, enabling servers to host a larger number of virtual machines.
Conway also talked about finer details in the Magny-Cours chip. Two six-core chips are connected by four hyperthreaded interconnects and are targeted at two- and four-socket servers, Conway said. It includes a total of 12MB of L3 cache, with each core supporting 512KB of L2 cache. The chips will be manufactured by AMD's spinoff, GlobalFoundries, using existing 5-nanometre technology.
AMD is also working on a new x86 chip architecture code-named Bulldozer. The architecture will be used in chips manufactured using the 32-nm process in 2011. The company has scheduled a 16-core chip code-named Interlagos for release in 2011.