Figure 1. ProVision ASIC Architecture for 5406zl
CPU
TCAM
Management
CPU
(
PowerPC 667MHz)
Memory
256MB
Serial
Compact Flash
Aux
USB
Management Module
Fabric Interface
Programmable function
Policy Enforcement
Engine
Classifier / Look-up
4 10-GbE Macs
Memory
Subsystem
Memory
Output
Memory
Input Memory
10G-ASIC
Memory
Output
Memory
Gig-ASIC
28.8 Gbps
backplane interface
Line Interface Module #1
Backplane
to all 6 modules
management
interface
CPU Interface
Cross Bar Fabric
Fabric Buffer
Fabric-ASIC
CPU
TCAM
Fabric Interface
Programmable function
Policy Enforcement
Engine
Classifier / Look-up
24 10/100 1000 Macs
Memory
Subsystem
Input Memory
Line Interface Module #6
/
CPU
TCAM
Management
CPU
(
PowerPC 667MHz)
Memory
256MB
Serial
Compact Flash
Aux
USB
Management Module
Fabric Interface
Programmable function
Policy Enforcement
Engine
Classifier / Look-up
4 10-GbE Macs
Memory
Subsystem
Memory
Output
Memory
Input Memory
10G-ASIC
Memory
Output
Memory
Gig-ASIC
28.8 Gbps
backplane interface
Line Interface Module #1
Backplane
to all 6 modules
management
interface
CPU Interface
Cross Bar Fabric
Fabric Buffer
Fabric-ASIC
CPU
TCAM
Fabric Interface
Programmable function
Policy Enforcement
Engine
Classifier / Look-up
24 10/100 1000 Macs
Memory
Subsystem
Input Memory
Line Interface Module #6
/
The diagram above illustrates an example of the logical interconnection of the ProVision ASICs on the 6-
slot 5406zl series switch. All of the key elements are connected to the active backplane. The active
backplane contains the switch fabric and distributes power to all modules. The ProCurve Switch 5412zl,
3548yl, 3524yl and 6224yl have similar architectural components. The primary difference in the
illustration would be the number of ports supported.
Inside the ProVision ASIC Architecture
Each line interface module contains a full ASIC-based Layer 3 routing switch engine as well as Layer 4
filtering and metering. These new ProVision ASICs are ProCurve's 4th generation switching ASICs. This
network switch engine, in the ProVision ASICs, provides all the packet processing: Layer 2 and Layer 3
lookups, filtering and forwarding decisions, VLAN, trunking and priority queuing determinations. The
ProVision ASIC on each line card contains its own CPU. These features of the ProVision ASIC are common
for all products in the ProCurve Switch 5400zl, 3500yl and 6200yl series.
Classification and Lookup
When a packet first comes in, the classifier section determines the packet characteristics, its addresses,
VLAN affiliation, any priority specification, etc. The packet is stored in input memory, lookups into the
table memory are done to determine routing information, and a ProVision ASIC specific packet header is
created for the packet with this information. This header is then forwarded to the Policy Enforcement
Engine.
Policy Enforcement Engine
The ProVision ASICs on each line interface module contain the Policy Enforcement Engine. This engine
provides fast packet classification to be applied to ACLs, QoS, Rate Limiting and some other features
through an onboard TCAM. Some of the variables that can be used include source and destination IP
addresses (can follow specific users), TCP/UDP port numbers and ranges (apply ACLs to an application
that uses fixed port numbers or ranges). Over 14 different variables can be used to specify the packets to
which ACL and QoS rules, rate limiting counters, and others are to be applied.
